1. Field of the Invention
The present invention relates a method of manufacturing a thin film transistor. More particularly, the present invention relates to a manufacturing method capable of etching an island semiconductor and reducing a thickness of a gate insulation layer at the same time.
2. Description of Related Art
Liquid crystal displays adopting thin film transistors (TFTs) are now popularly utilized in flat panel displays (referred as TFT-LCDs). Due to portability and display quality thereof, TFT-LCDs are widely applied in fields such as notebook computers, large-sized LCD TVs, and the like.
FIGS. 1A through 1E are cross-sectional views of five conventional photolithographic etching processes in a method of manufacturing a TFT:
Step 1: referring to FIG. 1A, a first metal layer is deposited on an insulation substrate 100, and a gate 110 and a storage capacitance electrode 111 are defined by a first photolithographic etching process.
Step 2: referring to FIG. 1B, after a gate insulation layer 120, an active layer 130, and an ohmic contact layer 140 are formed, an island semiconductor 102 is defined by a second photolithographic etching process.
Step 3: referring to FIG. 1C, after a second metal layer is deposited, a source 150 and a drain 160 are defined by a third photolithographic etching process and the second metal layer is used as a mask for etching the ohmic contact layer 140 to form a TFT back channel region.
Step 4: referring to FIG. 1D, after a passivation layer 170 is formed, a contact hole 180 is defined by a fourth photolithographic etching process and a part of the drain 160 is exposed.
Step 5: referring to FIG. 1E, after the transparent conductive layer is formed, a pixel electrode 190 is defined by a fifth photolithographic etching process, and the pixel electrode 190 and the drain 160 are electrically connected via the contact hole 180.
Referring to FIG. 1E continuously, the pixel electrode 190 stacks on the passivation layer 170 and the gate insulation layer 120 is opposite to the storage capacitance electrode 111 so as to form a capacitance C of the pixel. As illustrated in parallel plate capacitance equation (1), a size of the storage capacitance C of the pixel is proportional to an overlapped area A of the pixel electrode 190 and the storage capacitance electrode 111 and inversely proportional to a distance d between the pixel electrode 190 and the storage capacitance electrode 111.
                    C        =                  ɛ          ⁢                      A            d                                              (        1        )            
(∈ is a dielectric constant)
Since a predetermined value of the storage capacitance of the pixel is closely related to a charging/discharging property of the pixel of the TFT-LCD, an overgreat storage capacitance may have a problem of insufficient charging, and an oversmall storage capacitance easily results in flickering on a display frame. Moreover, scan lines, data lines, and storage capacitance electrode lines utilized in a thin film transistor array substrate of the TFT-LCD generally adopt light shielding metal materials. As the metal lines shield the light transmitted, an aperture ratio of the product is greatly restricted so that a power consumption of the backlight module increases. If the aperture ratio of the TFT-LCD is enhanced by reducing a width of the scan lines and the data lines, a RC loading of the TFT-LCD lines is then increased, thereby causing a distortion in signal transmission. On the other hand, if the aperture ratio of the TFT-LCD is enhanced by reducing a width of the storage capacitance electrode, then the storage capacitance may not satisfy the requirement, thereby causing flickering on the display frame and affecting display quality.
To solve the problems aforementioned, the method of manufacturing the TFT is provided in the present invention. By adjusting etching parameters of the island semiconductor, a part of the gate insulation layer exposed out of the island semiconductor is etched while the island semiconductor is being etched such that no extra processing steps are required. As a result, the thickness of the gate insulation layer over the storage capacitance electrode is reduced, the distance between the storage capacitance electrode and the pixel electrode is decreased, and the storage capacitance of the pixel is increased. Hence, the width of the storage capacitance electrode is reduced suitably and the aperture ratio of the product is increased.